The Universal Chiplet Interconnect Express (UCIe) Consortium released its 1.1 specification in conjunction with the 2023 FMS in Santa Clara, CA. UCIe is a standard interconnect technology for creating semiconductor packages that consist of chiplets performing various functions connected by the UCIe interconnect technology.
It is interesting that, in a sense, chiplets perform a disaggregation of traditional semiconductor chips that has similarities to the disaggregation of memory using CXL and digital storage using NVMe-oF.
As shown in the image below from a UCIe talk by Debendra Das Sharma at the 2023 FM,S as the costs of designing and making semiconductor devices increases exponentially as the lithographic processes get finer.
Chiplet packages are becoming an increasingly important way to deliver semiconductor-based products since it allows the more expensive very fine lithographic processes to be used where they create the biggest advantage, for instance, in semiconductor logic chiplets, while more relaxed and less expensive lithographic processes can be used for memory, networking and other chiplets.
The UCIe Consortium includes major customers and manufacturers or semiconductor technology including Alibaba Group, AMD, arm, ASE Group, Google, Intel, Meta, Microsoft, NVIDIA, Qualcomm, Samsung and TSMC. UCIe is compatible with PCIe and CXL, which runs on PCIe for enhancing and pooling heterogenous memory technologies.
The UCIe 1.1 specification is fully backward compatible with the 1.0 specification. This new specification includes enhancements for automotive applications, new streaming protocols, cost optimization in advanced packaging and enhancements for compliance testing.
The consortium announced the formation of an automotive working group to explore UCIe technology enhancements for automotive applications. The automobile industry is moving to the use of chiplets to broaden their ecosystem, and also likely to create a supply chain that is less vulnerable to supply chain issues (which led to problems during the COVID pandemic).
In particular UCIe 1.1 has several enhancements targeted at automotive applications. These are preventive monitoring of link health, run-time testability for failure rate of links and field repairability to get around communication faults.
UCIe 1.1 supports new data streaming protocols that support activities such as providing data for training AI models. It also allows creating packages of chiplets that function like Systems on Chips (SoCs), such as shown below.
These SoC like packages could be used where ever SoC are used today, such as in industrial, enterprise, data center and consumer applications. UCIe can also be incorporated with CXL switches to scale up chiplet package applications. This can help scale up UCIe products. Transporting the same on-chip protocol allows seamless the use of architecture specific features without converting between communication protocols. The streaming features available with UCIe enable communication robustness. In fact, the consortium allows off-package connectivity that can escape the package and the enclosure and even be used to communicate between racks using retimers and optical networking as shown in the image below.
UCIe brings PCIe connectivity down to the chip level and brings chip level communication to the system level. This will likely lead to new architectures and enable further disaggregation of traditional electronic devices and applications.
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